Wiring Diagram
Terminal Description
| Terminal | Meaning |
| CS1+/CS1- | Axis 1 SSI encoder interface, differential signal transmission method: RS422 |
| D1+/D1- | |
| CL1+/CL1- | |
| CS2+/CS2- | Axis 2 SSI encoder interface, differential signal transmission method: RS422 |
| D2+/D2- | |
| CL2+/CL2- | |
| +5V/0V | 5V DC power output terminal |
PXPDO Parameter Description
| Parameters | Data type | Meaning |
| Counter value CH1 | DINT | Axis 1 current angular position |
| Counter value CH2 | DINT | Axis 2 current angular position |
| Round CH1 | DINT | Axis 1 current turns |
| Round CH2 | DINT | Axis 2 current turns |
TXPDO Parameter Description
| Parameters | Data type | Meaning |
| ConfigData | UINT |
Bit0 0: Axis 1 Dual code 1: Axis 1 Gray code Bit2~Bit1, Axis 1 SSI baud rate setting 00：125K Baud 01：250K Baud 10：500K Baud 11：1MHz Baud Bit3: Reserved Bit4 0: Axis 2 Dual code 1: Axis 2 Gray code Bit6~Bit5, Axis 2 SSI baud rate setting 00：125K Baud 01：250K Baud 10：500K Baud 11：1MHz Baud Bit7~Bit15 Reserved |
| Coder Resolution CH1 | USINT |
Single-turn resolution of Axis 1, e.g., 10-bit, 12-bit... |
| Coder continuous round CH1 | USINT |
Number of bits occupied by continuous turns of Axis 1, e.g., 10-bit (1024 turns), 12-bit (4096 turns)... |
| Coder Resolution CH2 | USINT |
Single-turn resolution of Axis 2, e.g., 10-bit, 12-bit... |
| Coder continuous round CH2 | USINT |
Number of bits occupied by continuous turns of Axis 2, e.g., 10-bit (1024 turns), 12-bit (4096 turns)... |
Gated Output Mode Description
Gated Output Mode 1
Compare between the comparison value and the counter upper limit:
Gated comparison value 0 < counter value < counter upper limit (i.e., 232- 1): output on the gate (i.e., Q channel).
Counter lower limit (i.e., 0) < counter value < gated comparison value 0: no output on the gate (i.e., Q channel).
Note: The value for the gated comparison value 1 must be set greater than that for the gated comparison value 0; otherwise, the output will be abnormal.
Gated Output Mode 2
Compare between the comparison value and the counter upper limit:
Gated comparison value 0 < counter value < counter upper limit (i.e., 232- 1): no output on the gate (i.e., Q channel).
Counter lower limit (i.e., 0) < counter value < gated comparison value 0: output on the gate (i.e., Q channel).
Note: The value for the gated comparison value 1 must be set greater than that for the gated comparison value 0; otherwise, the output will be abnormal.
Gated Output Mode 3
Compare between the comparison value 0 and comparison value 1:
Gated comparison value 0 < counter value < gated comparison value 1: output on the gate (i.e., Q channel).
Counter lower limit (i.e., 0) < counter value < gated comparison value 0, or gated comparison value 1 < counter value < upper limit value (i.e., 232- 1): no output on the gate (i.e., the Q channel).
Note: The value for the gated comparison value 1 must be set greater than that for the gated comparison value 0; otherwise, the output will be abnormal.
Gated Output Mode 4
Compare between the comparison value 0 and comparison value 1:
Gated comparison value 0 < counter value < gated comparison value 1: no output on the gate (i.e., Q channel).
Counter lower limit (i.e., 0) < counter value < gated comparison value 0, or gated comparison value 1 < counter value < upper limit value (i.e., 232- 1): output from the gate (i.e., Q channel).
Note: The value for the gated comparison value 1 must be set greater than that for the gated comparison value 0; otherwise, the output will be abnormal.